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Virtual addresses are used by the operating system to access kernel and user memory. The CPU manages translation of virtual to physical addresses using its Memory Management Unit (MMU). A virtual address is specified as a offset from the start of a memory segment; these segments are used by the kernel and user processes to hold their text, stack, data, and other regions. See ``How a virtual address is translated to a physical address''.
The upper 13 bits (3 through 15) of a segment selector holds the entry in the Global Descriptor Table (GDT) used by the kernel, or a process's Local Descriptor Table (LDT). The lower three bits indicate whether the descriptor table belongs to the kernel or a user process and its privilege level. A segment's descriptor table entry stores (among other things) its base linear address; this is added to the offset to produce a linear address. (This intermediate linear addressing enables non-contiguous physical pages to appear contiguous within a segment.)
The upper 10 bits of a linear address index an entry in the page directory table; the base of this table is pointed to by control register 3 (CR3), also known as the page directory base register (PDBR). The contents of this table can be examined using the sdt command of crash(ADM). The entry in the page directory table points to the base of a page table.
How a virtual address is translated to a physical address
Bits 12 to 21 of a linear address index an entry in the page table pointed to indirectly by the upper 10 bits. The contents of the page tables can be examined using the pdt command of crash. The entry in the page table points to the base address of physical page in memory; the lowest 12 bits of a linear address act as an offset to the location of the physical address within the page.